Persistent Memory Summit 2018 Speakers

Zvonimir Z. Bandic, Senior Director, Next Generation Platform Technologies Western Digital Corporation

Zvonimir Z. Bandić is the Research Staff Member and Senior Director of Next Generation Platform Technologies at Western Digital Corporation. He is currently focusing on emerging Non-Volatile Memories (PCM, ReRAM, MRAM) applications for data center, distributed computing, including RISC-V based CPU technologies, in-memory compute, RDMA networking, and machine learning hardware acceleration. He received his BS in electrical engineering in from the University of Belgrade, Yugoslavia, and his MS and PhD in applied physics from Caltech, Pasadena, in the field of novel electronic devices based on wide bandgap semiconductors. He has been awarded over 50 patents in the fields of solid state electronics, solid state disk controller technology, security architecture and storage systems and has published over 50 peer-reviewed papers.

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Stephen Bates, Chief Technology Officer, Eideticom

Stephen Bates is the CTO of Eideticom and is a renown expert on topics like NVMe, RDMA, TCP/IP and NVM. He has worked on a range of complex storage and communication systems include the NVMe controllers and PCIe switches developed by his former employer Microsemi (formerly PMC-Sierra). He enjoys working at the interface between hardware and software and is a active contributor to the Linux kernel. Before Eideticom he worked in the CTO at PMC-Sierra and before that was an Assistant Professor in Computer Engineering at The University of Alberta. He holds a PhD from The University of Edinburgh, Scotland.

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Per Brashers, Storage Strategist, Yttibrium

Per Brashers is a storage strategist with long term vision. Inventor of multiple storage platforms, including OpenVault and ColdStorage solutions for OpenCompute. Designer of multiple inter-related systems for the ambient data center. Co-Author for pNFS-Block, Architect for fastest hadoop engineered storage solution, Converted 3X replica strategy into erasure-coded storage for greatest efficiency.

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Richard A. Brunner, Vice President, Server Platform Technologies, VMware

Richard A. Brunner is a Principal Engineer and the Chief Platform Architect in the CTO office at VMware. He is responsible for defining and driving future platform features that can benefit virtualization. Richard has over 34 years of experience in the computer industry working as an architect for IBM, DEC, Intel, and AMD. He has been focusing on Non-Volatile Memory as of late.

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Brian Bulkowski, Founder, CTO and Product, Aerospike

Brian is a founder of Aerospike, CTO & Product, networking whiz, innovator and high performance expert. ‘My family has a long and varied history in science and tech, so I wound up shipping code in high school. One of the great things about software is you can build something with it. You don’t need plywood or welding. Computers are an easy way to start creating stuff. My first taste of networking was in 1989. I knew there was a whole world out there waiting. A computer that’s not connected to a network is kind of dull.’

Brian became a Lead Engineer at Novell, and then Chief Architect of Cable Solutions at Liberate – where he built a high-performance, embedded networking stack, as well as the high scale broadcast server infrastructure. As Director of Performance at Aggregate Knowledge, Brian had direct experience with the scaling limitations of sharded MySQL systems. ‘It wasn’t hard to see that there was a huge need for a new distributed database, because they all sucked. Everyone was struggling with what was available. That led to the idea for Citrusleaf – which then became Aerospike.’

When he’s not busy creating stuff with plywood or a welding torch, Brian plays cello in a band called Rosincoven. He also writes about cuisine for the San Jose Metro.

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Neal Christiansen, Principal Software Development Lead, Windows Storage and File Systems Group, Microsoft

Neal Christiansen is a Principal Software Development Lead for the Core File Systems team in the Windows Storage and File Systems Group at Microsoft (Redmond, WA). Neal joined Microsoft in 1999 as a member of the File System Filters team. In 2002 he became the Lead for this team and led the design and implementation of the Windows Filter Manager. In 2007 he became the lead of the NTFS development team. Neal has been involved with many technical advancements in the file systems and file system filter spaces and has 30+ years of system software development experience. He led the design and implementation of the NSS File System for NetWare while at Novell. Neal also led the design and implementation of the Motorola 68K based WMCS operating system while at Wicat Systems. Neal has a BS in Computer Science from Brigham Young University

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Tom Coughlin, President, Coughlin Associates

Tom Coughlin, President, Coughlin Associates is a widely respected storage analyst and consultant. He has over 35 years in the data storage industry with multiple engineering and management positions at high profile companies.. He founded Coughlin Associates, which provides market and technology analysis as well as Data Storage Technical Consulting services Tom is active with a variety of professional organizations, including SMPTE, the IEEE (he is Director for IEEE Region 6 and active in the Consumer Electronics Society) , and SNIA, where he is a frequent speaker and the Education Chair of the SNIA Solid State Storage Initiative. Tom publishes the Digital Storage Technology Newsletter, the Media and Entertainment Storage Report, the Emerging Non-Volatile Memory Report and other industry reports, and is also a regular contributor on digital storage for Forbes.com

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Rob Davis, Vice President of Storage Technology, Mellanox Technologies, Inc.

Rob Davis is Vice President of Storage Technology at Mellanox where he focuses on ways to apply high-speed interfaces to storage systems. As a technology leader and visionary for over 35 years, he has been a key figure in the development of an entire generation of storage networking products. He is currently leading the development and marketing of products based on NVMe over fabrics, which will allow for the high-speed networking of PCIe-based storage. Davis was previously Vice President and Chief Technology Officer at QLogic, where he drove development and marketing of Fibre Channel, Ethernet and InfiniBand technology into new markets such as blade servers. Before joining QLogic, Davis worked at Ancor Communications, where he drove development and marketing of Fibre Channel and InfiniBand products. Davis’ areas of expertise include virtualization, Ethernet, Fibre Channel, SCSI, iSCSI, InfiniBand, RoCE (remote DMA over converged Ethernet), PCI, NVMe and Persistent Memory.

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Bill Gervasi, Principal Systems Architect, Nantero

Bill Gervasi has been involved in the definition and application of DRAM and Flash memory devices and modules for over 40 years, and has been a chairman of JEDEC for over 20 years. Mr. Gervasi has worked with Intel, Octel, S3, Transmeta, Netlist and SimpleTech to develop and deploy memory technologies. He is Principal Systems Architect for Nantero and holds 10 patents in memory design.

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Amit Golander, Technical Director, NetApp

Dr. Amit Golander is a Technical Director at NetApp, where he leads the development of the Plexistor PM-based software. Amit is a technology leadership expert with Product and BD skills forged at Plexistor, Tonian and IBM. Amit has a rich R&D background, leading global software and hardware technical teams since 2000 and composing over 60 papers and patents. Amit holds a PhD in Computer Architecture and diverse work experience in Storage, Servers and Networking.

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Paul Grun, Open Fabrics Alliance Vice Chair; Advanced Technology Group, Cray, Inc

Paul Grun is a member of Cray’s Advanced Technology Group. During his more than 30 year career he has been intimately involved in all aspects of server I/O beginning with storage for large mainframe systems, turning to high performance network architecture and now focusing on applying I/O technology to building large scale systems at Cray Inc. His association with advanced networking technology stretches back to prior to the emergence of InfiniBand when he represented Intel to the InfiniBand Trade Association (IBTA). He has served as chair of the IBTA’s Technical Working Group and as chair for the working group responsible for creating the RoCE (RDMA over Converged Ethernet) specifications. He is currently active representing Cray as a member of the IBTA’s Steering Committee. Paul has also been influential in the OFA since its inception in 2004; in addition to his current role serving as the OFA’s Vice Chair, he is serving as the co-chair of the OpenFabrics Interfaces Working Group (OFIWG) and as chair of the Data Storage / Data Access Working Group.

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Jim Handy, Gen'l Director, Objective Analysis

Jim Handy of Objective Analysis has over 35 years in the electronics industry including 20 years as a leading semiconductor and SSD industry analyst. Early in his career he held marketing and design positions at leading semiconductor suppliers including Intel, National Semiconductor, and Infineon. A frequent presenter at trade shows, Mr. Handy is known for his technical depth, accurate forecasts, widespread industry presence and volume of publication. He has written hundreds of market reports, articles for trade journals, and white papers, and is frequently interviewed and quoted in the electronics trade press and other media.

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Nikita Ivanov, Founder & CTO, GridGain Systems

Nikita Ivanov is founder and CTO of GridGain Systems, started in 2007 and funded by RTP Ventures and Almaz Capital. Nikita has led GridGain to develop advanced and distributed in-memory data processing technologies — the top in-memory data fabric starting two times per second every day around the world.

Nikita has over 20 years of experience in software application development, building HPC and middleware platforms, contributing to the efforts of other startups and notable companies including Adaptec, Visa and BEA Systems. Nikita was one of the pioneers in using Java technology for server side middleware development while working for one of Europe’s largest system integrators in 1996.

He is an active member of Java middleware community, contributor to the Java specification, and holds a Master’s degree in Electro Mechanics from Baltic State Technical University, Saint Petersburg, Russia.

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Randy Kerns, Enterprise Management Associates

In his role as Senior Strategist at Evaluator Group, Randy Kerns brings expertise from virtualization everywhere to very long term archive to help end users and vendors develop strategic plans, product roadmaps and evaluate options. He draws from over 40 years in the computer industry helping storage companies design and develop storage system products for their markets as well as advising technical professionals on how to build the best storage infrastructures to streamline their business processes.

Randy Kerns spent many years in executive level product strategy and design positions. He was vice president of storage strategy and planning at Sun Microsystems; he developed disk and tape systems for mainframe attachment at IBM and StorageTek; he designed disk systems for attachment to open systems and proprietary computer platforms at Fujitsu and Tandem Computers; and he developed tape and disk systems for three start-up companies.

Prior to joining Evaluator Group, Randy served as CTO for ProStor where he brought products to market addressing long term archive for Information Technology and the Healthcare and Media / Entertainment markets.

Randy Kerns earned a bachelor’s degree in Computer Science from the University of Missouri at Rolla and a master’s degree in engineering computer science from the University of Colorado.

An educator and presenter, Randy Kerns has written numerous industry articles and papers and is the author of Planning a Storage Strategy, a book that offers step-by-step guidance on how to build an information storage strategy as part of a larger business process and most recently is the author of Information Archiving – Economics and Compliance, which is the first book of its kind to explore archiving of information in depth. Randy Kerns has regularly taught classes on storage technology in the United States and Europe.

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Eden Kim, Chief Executive Officer, Calypso Systems Inc.

Eden Kim is the CEO of Calypso Systems, Inc. - a leading designer and manufacturer of test software and platforms for high performance storage products. Calypso is also the developer of the TestMyWorkload.com website for free IO Capture and Analysis of Real World Workloads.

Mr. Kim is also chair of the SNIA SSSI TechDev Committee, chair of the SNIA Solid State Storage Technical Work Group and a member of the SNIA SSSI Governing Board.

Mr. Kim has been presenting at industry trade shows in the US, China, Taiwan and Japanese markets to introduce Real World Storage Workload Capture, Analysis and Test.

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David J. Koenen, Sr. Product Manager, Infrastructure SoC Business Line, ARM

David manages the product lifecycle for Infrastructure SoCs Reference Designs and System Guidance targeted at Servers and Networking markets. He is on the Gen-Z Consortium’s BoD and Marketing Workgroups and has also served on IEEE 802.3 Ethernet standards. David has a Bachelor degree in Aerospace Engineering and Mechanics, a Master degree in Electrical Engineering and 14 patents.

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Michael Krause, VP / Fellow, HPE

Krause is a VP / Fellow responsible for the development of advanced technologies and solution strategies covering Gen-Z, PCIe, I/O, accelerators, memory / persistent memory, networking, block NVM, ultra-low-latency messaging, etc.

 

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Scott Miller, Technology Fellow, Engineering and Infrastructure DreamWorks Animation

Scott Miller is a Technology Fellow for Engineering and Infrastructure at DreamWorks Animation, where he guides the technical direction of the studio’s infrastructure technology. Scott is focused on operations and implementing long-term strategies for high performance computing, high performance storage and networking. He is responsible for the computational visualization infrastructure required for creating computer generated 3D animated films.

In his role, Scott provides technology expertise and advanced systems architecture strategy supporting the studio’s high performance compute infrastructure. Working with HP, he implemented the first offsite grid computing for feature animation rendering on Madagascar and Shrek 2, including a wide-area NFS caching approach to enable offsite computing without pipeline or software modifications. This work continues today to empower DreamWorks Animation’s use of the cloud for compute, storage and analytics.

In his many years in the entertainment industry, Scott has credits on over 30 productions including The Boss Baby. Prior to joining DreamWorks Animation, Scott was a Senior Staff Engineer in Visual Effects at Walt Disney Feature Animation. He also worked in the aerospace industry for 11 years as a Senior Software Engineer at Honeywell Aerospace/Hughes Aircraft. Scott received a B.S. and a M.S. from California State University, Fullerton.

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Alan Niebel, Chief Executive Officer, WebFeet Research

Alan Niebel is the CEO for WebFeet Research that has been recognized as the premier market research firm that focuses exclusively on the memory and storage markets. WFR’s charter qualifies and quantifies Flash and non-volatile memory and bridges their transition to next generation use and cognitive computing. Alan’s over 35 year career in electronics includes over 20 years as an analyst where he writes, speaks and consults with every major semiconductor manufacturer. His current projects analyze emerging market solutions for In-Memory Computing inclusive of first generation persistent memory platforms. Subjects covered include the application of intelligence to direct attached Flash Storage, Memory Channel NVDIMM and DRAM/PM/XPoint technologies.

Alan Niebel received his B.A. degree from UCSB and his MBA from the Monterey Institute of International Studies.

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Michael Oros, Executive Director, SNIA

Michael Oros is Executive Director at Storage Networking Industry Association, where he oversees the group, industry collaboration and standards work of the organization. Michael brings 20 years of strategy, planning and development experience in IT services and high-tech industry to SNIA. Before joining the organization, Michael held roles at Intel including oversight of technology initiatives and collaboration on open standards, as well as the deployment of storage, backup, and disaster recovery services for the organization. He led the storage and networking components vendors through the biggest I/O transitions of the past decade, while playing a key role in the introduction, adoption and ramp of PCI Express, InfiniBand, OpenFabrics, and various storage/memory technologies in server, cloud, HPC and storage industries. Michael holds an MBA in strategic management, marketing and international business from USIU.

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Jim Pappas, Vice Chair, SNIA Board of Directors; Co-Chair, SNIA Solid State Storage Initiative; Director of Technology Initiatives, Data Center Group, Intel Corporation

Jim Pappas is the Director of Technology Initiatives in Intel’s Data Center Group. In this role, Jim is responsible to establish broad industry ecosystems that comply with new technologies in the areas of Enterprise I/O, Energy Efficient Computing, and Solid State Storage. Jim has founded, or served on several organizations in these areas including: PCI Special Interest Group, InfiniBand Trade Association, Open Fabrics Alliance, The Green Grid, and several emerging initiatives in his newest focus area of Solid State Storage. Jim has previously been the Director of Technology Initiatives in Intel’s Desktop Products Group, and successfully led technologies such as AGP Graphics, DVD, IEEE 1394, Instantly Available PC, PCI, USB, and other advanced technologies for the Desktop PC. Jim has 30 years of experience in the computer industry. He has been granted eight U.S. patents in the areas of computer graphics and microprocessor technologies. He has spoken at major industry events including the Intel Developer’s Forum (IDF), WinHEC, Storage Networking World, PC Strategy, Microprocessor Forum, Consumer Electronics Show, Server I/O and the Applied Computing Conference. He holds a B.S.E.E. from the University of Massachusetts, Amherst, Massachusetts

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Andy Rudoff, Member, SNIA NVM Programming Technical Work Group and Persistent Memory SW Architect, Intel Corporation

Andy Rudoff is an Architect in the Datacenter Software Division at Intel Corporation. He has over 25 years experience in operating systems internals, file systems, and networking. Andy is co-author of the popular Unix Network Programming book. His recent work focuses on Non-Volatile Memory Programming models and algorithms for using Persistent Memory.

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Gil Russell, Principal Technology Analyst WebFeet Research, Inc.

Gil Russell merged Semiscape with WebFeet Research Inc. in August 2016 where he continues specializing in next generation semiconductor technology for In-Memory Computing, Near Data Processing-Acceleration, Predictive Analytics, Neuromorphic Execution Units and Cognitive Intelligent Computing.

He co-founded Bright Side Analytics, an IT consulting firm in July 2005 specializing in dynamic and non-volatile memory technologies. He has managed numerous new product definition activities - participating as a member of new product development engineering groups; technical lead of new product introductions; technical interface and liaison to external partnerships at Infineon Technologies, Siemens Microelectronics, NEC and Samsung Semiconductor.

He conceived and developed the Reduced Latency DRAM [RLDRAM] Architecture in 1998 which became the defacto standard for high performance communications processors. His industry standards work include Synchronous DRAM; DDR1; DDR2; DDR3; DDR4; LPDRAM; RDIMM; LRDIMM; RLDRAM; SLDRAM; JEDEC BoD - JC42/16 Chairs and M11 Memory Steering Committee.

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Jeff Suecheli, Senior Technical Staff Member, IBM

Dr. Stuecheli is a Senior Technical Staff Member in IBM’s Systems and Technology Group and works in the area of server hardware architecture. His most recent work includes advanced memory architectures, cache coherence, and accelerator design. He has contributed to the development of numerous IBM products in the Power Architecture family, most recently the POWER9 design. He has been appointed to IBM Master Inventor, authoring some 100 patents. Dr. Stuecheli received his B.S., M.S., and Ph.D. degrees from The University of Texas Austin in Electrical Engineering.

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Tom Talpey, Architect, Microsoft

Tom Talpey is an Architect in the File Server Team at Microsoft. His responsibilities include SMB 3, SMB Direct (SMB over RDMA), and all the protocols and technologies that support the SMB ecosystem. Tom has worked for many years in the areas of network filesystems, network transports and RDMA, and recently has been working on applying these to remote access of Persistent Memory, working within the SNIA Nonvolatile Memory Programming TWG, and others.

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Kothanda (Kodi) Umamageswaran, Vice President, Exadata Development, Oracle Corporation

Kothanda (Kodi) Umamageswaran is a Vice President at Oracle Corporation. He joined Oracle in 1997 and has over 20 years of system software expertise and technology leadership . Kodi began his career developing clustering solutions at Oracle before moving on to infrastructure and systems for the Oracle database. Now his core responsibilities are the development of the mission-critical capabilities for Exadata, including the high availability, performance, manageability, and security

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Jack Vargas, Product Marketing Manager, Intel Corporation

Jack Vargas is a Product Marketing Manager for Intel Corporation Data Center Group, where he focuses on the shift to persistent memory and empowering developers to program to persistence.

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Doug Voigt, Chair, SNIA NVM Programming Technical Work Group and Distinguished Technologist, Hewlett Packard Enterprise

Doug Voigt is a member of the SNIA Technical Council and Chair of the SNIA NVM Programming Model TWG. He is a Distinguished Technologist in the Chief Technologist’s office of HPE’s Storage Division. Doug has over 37 years of development experience in disk drives, disk arrays, storage management and non-volatile memory. He holds CS and EE degrees from Cornell University and 33 US patents, primarily in virtual arrays.

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Andrew Walker, Vice President of Product, Spin Transfer Technologies

Andrew J. Walker is a 30-year-plus veteran of the semiconductor industry. He was with Philips Research Laboratories, Eindhoven, The Netherlands from 1985 to 1994 where he worked on CMOS and non-volatile memory research and development. Since 1994, he has worked for several Silicon Valley companies including Cypress Semiconductor, Artisan Components and Matrix Semiconductor. He has been involved with 3-D Flash memory technology since 2000 and founded Schiltron Corporation to investigate and develop new 3-D Flash technologies. He has published in all areas of silicon device physics and technology with 3-D thin-film transistor-based Flash memory being the focus since 2003. He has about fifty US patents to his name. He recently joined Spin Transfer Technologies to work on MRAM. Andrew received the B.Sc. degree (with honors) in physics from the University of Dundee, Scotland and the Ph.D. degree from the Technical University of Eindhoven, The Netherlands. He is a member of the IEEE and the Institute of Physics, London.

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Brett Williams, Business Development Manager, Micron Semiconductor

Brett Williams has a BSEE from Brigham Young University, Intel (9 yrs) Application engineer/FAE/Regional Architectural Specialist, Micron (28 yrs) – Apps Eng, Apps Mgr, Started Crucial Technology, General Manager – Platform architecture Group.

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Dan Williams, Open Source Developer, Intel Corporation

Dan Williams is presently a Linux kernel developer in Intel’s Open Source Technology Center. His primary role is enabling next generation storage technologies, like persistent memory. In his more than a decade long history of contributing to the Linux kernel he has also had the opportunity to work on embedded system-on-a-chip enabling, memory management, and other core functionality.

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