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NVM Summit 2016 Presentations

NVM Summit 2016 Presentations

All the Ways 3D XPoint Impacts Systems Architecture

Rick Coulson, Senior Fellow, Intel
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Abstract

Within the memory of many of us there has been a slow progression of storage from early HDDs through modern HDDs. Then there was a discontinuity with the advent of SSDs with the unique performance improvements they delivered. We are now on the brink of a still more dramatic improvement in persistent memory with enormous capacity, memory-like speed and non-volatility. This will make the long-awaited promise of the convergence storage and memory a reality. This talk will explain this most recent development and describe its pervasive impact on systems architecture.

Rethinking Benchmarks for Non-Volatile Memory Storage Systems

Professor Ethan L. Miller, Professor of Computer Science, UCSC
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Abstract

As storage systems based on non-volatile memory (NVM) increasingly supplant disk-based systems for performance-critical data, users need to understand how these systems will perform on their data. Traditional storage benchmarks were aimed at individual storage devices capable of hundreds of IOs per second (IOPS), with only the largest systems capable of hundreds of thousands of IOPS. Today, NVM-based systems can exceed a million IOPS, but this performance is often dependent on the content of the data as well as the access patterns.

This talk will describe the challenges for benchmarks posed by the transition to NVM, and propose potential solutions to these challenges. These challenges include generating "realistic" data in terms of both compressibility and deduplication, issues created by the need to generate realistic IO request distributions at rates of millions of IOPS, and techniques for pre-populating a storage device with data in a way that matches real-world usage. Making benchmarks repeatable is also a concern, since most existing approaches rely on independent executions that may be merged in different ways that can impact performance.

Memory is the New Storage: How Next Generation NVM DIMMs will Enable New Solutions That Use Memory as the High-Performance Storage Tier

Ken Gibson, NVM SW Architecture, Intel
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Abstract

Memory-attached NVM and the SNIA NVM Programming Model enable applications to use memory as the new performance storage tier creating disruptive opportunities as solutions replace the traditional I/O-based software architecture for their hottest data. This talk reviews some of the decades-old assumptions that change for suppliers of storage and data services as solutions move to memory as the new storage.

Future Memories and Today's Opportunities

Jim Handy, General Director, Objective Analysis
Tom Coughlin, President, Coughlin Associates
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Abstract

This talk will explore the role of NVM in today's and future applications. We will discuss the various NVM technologies in use today, look at their characteristics and how these will lead to their applications in the emerging memory/storage hierarchy. This presentation will also give some market analysis and projections for these technologies.

NVM Futures Panel: Emerging Embedded Memory Technologies

Moderator: Matt Bryson, SVP-Research, ABR;
Participants: Rajiv Ranjan, Co-founder & CTO, Avalanche; Joe O’Hare, Director Product Marketing, Everspin; David Eggleston, Vice President Embedded Memory, Global Foundaries
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Abstract

The NVM Futures Panel discussion will explore the current status and future opportunities for NVM technologies and in particular both embedded and standalone MRAM technologies and associated applications. The discussion will highlight that MRAM has “emerged” as a viable technology and is being designed/shipped into solutions/systems today. Furthermore, the panel will examine where future improvements will take MRAM (and more generally NVM technology) as well as future market opportunities that are likely to emerge beyond the initial toeholds that have now been achieved. Finally, the panel will talk to the potential challenges and opportunities for NVM architectures created by the significant publicity and high profile Intel has built around its 3D XPoint architecture.

Changes Coming to Architecture with NVM

Edward Sharp, Chief Strategy and Technology, PMC-Sierra
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Abstract

The IT industry has made tremendous progress innovating up and down the computing stack to enable, and take advantage of, non-volatile memory (NVM). New media types are joining NAND Flash, enhanced controllers and networking are being developed to unlock the latency and throughput advantages of NVM, CPU architectures are evolving, and OSes are being enhance. This is all necessary innovation to realize the full potential of NVM. But is it sufficient? Where are the weakest links to fully unlock the potential of NVM?

Things Are Happening in Solid State Storage!

Don Jeannette, VP Trendfocus
John Chen, VP Trendfocus
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Abstract

PCIe continues to make strides in multiple market segments. The market continues to see various form factors, protocols, and deployments, depending varying vendor strategies, the race to gain market share, competitive pressure, and the general push to provide better, faster performing solutions. Don Jeanette and John Chen will discuss What’s happening in various segments, and why, as it relates to PCIe.

Latency in Context: Finding Room for NVMs in the Existing Software Ecosystem

Dejan Vucinc, HGST San Jose Research Center
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Abstract

Several kinds of non-volatile memory (NVM) technology in development aim at filling the wide gap between DRAM and NAND flash in terms of bandwidth, access latency, write endurance, retention time and raw bit error rate. The intermediate latency and error rate characteristics of these new memory technologies make them uncomfortable replacements for DRAM. Such a substitution will require significant changes to the CPU architecture and software stack to account for the much higher (and possibly stochastic) access latency. In addition, special attention is required for wear leveling, error correction and data protection at rest—problems which are not prominent with contemporary DRAM devices but are bread and butter of SSD storage devices.

For these reasons, at HGST Research we have been working diligently to find out where is there room in the existing hardware/software ecosystem for emerging NVM technology when viewed as block storage rather than main memory. In this presentation I will show an update on our previously published results using prototype PCI Express-attached PCM SSDs and our custom device protocol, DC Express, as well as measurements of its latency and performance through a proper device driver using several different kinds of Linux kernel block layer architecture. A discussion of strategies for reducing latency spikes under Linux will follow.

Finally, I will show a preview of our latest work showing that PCM SSDs deployed in a networked environment offer end-to-end application performance comparable to remote DRAM when accessed via InfiniBand RDMA and using PCIe peer-to-peer communication.

NVDIMM Panel

Moderator: Arthur Sainio, Director Marketing, SMART Modular
Participants: Amit Golander, CTO Plexistor; Alex Fuxa, Director Engineering, HP; Marc Schneider, Sr. Product Manager, Supermicro
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Abstract

The IT industry has made tremendous progress innovating up and down the computing stack to enable, and take advantage of, non-volatile memory (NVM). New media types are joining NAND Flash, enhanced controllers and networking are being developed to unlock the latency and throughput advantages of NVM, CPU architectures are evolving, and OSes are being enhance. This is all necessary innovation to realize the full potential of NVM. But is it sufficient? Where are the weakest links to fully unlock the potential of NVM?

Storage Class Memory Support in the Windows OS

Neal Christiansen, Principal Development Lead, Microsoft, Microsoft
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Abstract

Core Memory is making a comeback! Or that has been the promise for many years with technologies such as PCM, ReRAM, STT-RAM, etc. They have all promised faster than NAND access latencies, persistent storage, and memory bus access; with these attributes, there is the potential to change current storage programming models significantly. There are products, finally, coming to market that meet these criteria. These Storage Class Memories (SCM) have been the topic of R&D for the last few years and with the promise of near term product delivery the question is: how will Windows be enabled for such SCM products and how can applications take advantage of these capabilities. To be successful, SCM enablement must be done in a way that provides improved value for current applications while providing for new application paradigms.

Persistent Memory in Linux

Jeff Moyer, Principal Software Engineer, Red Hat
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Abstract

This talk will give an overview of the current state of persistent memory support in the Linux kernel. The device model and file system support will be discussed. Time will also be dedicated to explaining how to get started using persistent memory in Fedora.

Microsoft SQL Hekaton – Towards Large Scale Use of PM for In-memory Databases

Cristian Diaconu, Principal Software Engineer, Microsoft
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Abstract

This talk uses the example of Hekaton (Sql Server in-memory database engine) to break down the opportunity areas for non-volatile memory in the database space. I will focus on three areas: (i) logging – and how byte addressable NVM can help there in a way that block mode cannot, (ii) high-availability which is impacted by the choice of the logging scheme and (iii) checkpointing which is modified in a fundamental way to allow the database to take advantage of byte-addressable NVM.This talk uses the example of Hekaton (Sql Server in-memory database engine) to break down the opportunity areas for non-volatile memory in the database space. I will focus on three areas: (i) logging – and how byte addressable NVM can help there in a way that block mode cannot, (ii) high-availability which is impacted by the choice of the logging scheme and (iii) checkpointing which is modified in a fundamental way to allow the database to take advantage of byte-addressable NVM.

Going Remote at Low Latency: A Future Networked NVM Ecosystem

Tom Talpey, Architect File Server Team, Microsoft
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Abstract

As new ultra-low latency storage such as Persistent Memory and NVM is deployed, it becomes necessary to provide remote access - for replication, availability and resiliency to errors. The SNIA NVM TWG has been exploring these technologies and has published white papers outlining requirements for remotely utilizing such devices. Remote Direct Memory Access (RDMA), arbitrated by file and block storage protocols, is a clear choice for this access, but existing RDMA and storage protocol implementations incur latency overheads which impact the performance of the solution, and lack certain semantics necessary to ensure durability by a remote peer. At last Fall’s Storage Developer’s Conference, a path-finding effort for reducing these latencies and providing new semantics was described. This talk picks up where that left off and will introduce a concrete proposal, outlining some of its potential benefits.

Persistent Memory over Fabric

Kevin Deierling, VP Marketing, Mellanox
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Abstract

This presentation will discuss the role of the network in developing Persistent Memory over Fabrics – key goals and the key fabric features requirements. Specifically how RDMA can be leveraged by persistent memory and what are the key mechanisms to achieve both low latency and scalability of persistent memory operations across the fabric.