A test access port and boundary-scan architecture for digital integrated circuits and for the digital portions of mixed analog/digital integrated circuits are discussed. These facilities seek to provide a solution to the problem of testing assembled printed circuit boards and other products based on highly complex digital integrated circuits and high-density, surface-mounting assembly techniques. The facilities also provide a means of accessing and controlling design-for-test features built into the digital integrated circuits themselves. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test features is defined, including a boundary-scan register, so that the component is able to respond to a minimum set of instructions designed to assist with testing of assembled printed circuit boards. (This publication includes IEEE 1149.1a-1993.)
- Sponsor Committee
- C/TT - Test Technology
Learn More About C/TT - Test Technology - Status
- Superseded Standard
- Board Approval
- 1993-06-17
- History
-
- ANSI Approved:
- 1993-12-08
- Published:
- 1993-10-21
Working Group Details
- Society
- IEEE Computer Society
Learn More About IEEE Computer Society - Sponsor Committee
- C/TT - Test Technology
Learn More About C/TT - Test Technology
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